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authorPhilipp Rossak <embed3d@gmail.com>2017-08-30 05:01:09 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-09-17 12:04:27 +0200
commit5a8e62eb576c666da6c4fb2626cd0d07dfa74a65 (patch)
tree1eaf737875dc9d4a32d4c00c286eb9f3a05a16bb /arch
parentARM: dts: sun8i: h3: nanopi-m1-plus: Enable IR controller (diff)
downloadlinux-5a8e62eb576c666da6c4fb2626cd0d07dfa74a65.tar.xz
linux-5a8e62eb576c666da6c4fb2626cd0d07dfa74a65.zip
ARM: dts: sun8i: h3: Adding UART3 RTS and CTS Pins
This node adds the definition for the UART3 RTS and CTS Pins That makes it able to use UART3 with RTS and CTS. Signed-off-by: Philipp Rossak <embed3d@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 11240a8313c2..a52a9e6d6eaa 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -381,6 +381,11 @@
pins = "PA13", "PA14";
function = "uart3";
};
+
+ uart3_rts_cts_pins: uart3_rts_cts {
+ pins = "PA15", "PA16";
+ function = "uart3";
+ };
};
timer@01c20c00 {