summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorMaciej W. Rozycki <macro@imgtec.com>2017-06-16 01:07:34 +0200
committerRalf Baechle <ralf@linux-mips.org>2017-06-29 02:42:26 +0200
commit11a3799dbeb620bf0400b1fda5cc2c6bea55f20a (patch)
treee04e3cf3a4a30b7f8bcab14a555bfc8fdfa9d7a8 /arch
parentMIPS: Actually decode JALX in `__compute_return_epc_for_insn' (diff)
downloadlinux-11a3799dbeb620bf0400b1fda5cc2c6bea55f20a.tar.xz
linux-11a3799dbeb620bf0400b1fda5cc2c6bea55f20a.zip
MIPS: Fix unaligned PC interpretation in `compute_return_epc'
Fix a regression introduced with commit fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") and defer to `__compute_return_epc' if the ISA bit is set in EPC with non-MIPS16, non-microMIPS hardware, which will then arrange for a SIGBUS due to an unaligned instruction reference. Returning EPC here is never correct as the API defines this function's result to be either a negative error code on failure or one of 0 and BRANCH_LIKELY_TAKEN on success. Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.") Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # 3.9+ Patchwork: https://patchwork.linux-mips.org/patch/16395/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/include/asm/branch.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/mips/include/asm/branch.h b/arch/mips/include/asm/branch.h
index de781cf54bc7..da80878f2c0d 100644
--- a/arch/mips/include/asm/branch.h
+++ b/arch/mips/include/asm/branch.h
@@ -74,10 +74,7 @@ static inline int compute_return_epc(struct pt_regs *regs)
return __microMIPS_compute_return_epc(regs);
if (cpu_has_mips16)
return __MIPS16e_compute_return_epc(regs);
- return regs->cp0_epc;
- }
-
- if (!delay_slot(regs)) {
+ } else if (!delay_slot(regs)) {
regs->cp0_epc += 4;
return 0;
}