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authorMatt Redfearn <matt.redfearn@imgtec.com>2017-08-08 14:22:31 +0200
committerRalf Baechle <ralf@linux-mips.org>2017-09-06 13:19:08 +0200
commitb332fec0489295ee7a0aab4a89bd7257cd126f7f (patch)
tree135e65a5deb1acf66b651f5981a7406936b27a8d /arch
parentMIPS: Handle non word sized instructions when examining frame (diff)
downloadlinux-b332fec0489295ee7a0aab4a89bd7257cd126f7f.tar.xz
linux-b332fec0489295ee7a0aab4a89bd7257cd126f7f.zip
MIPS: microMIPS: Fix detection of addiusp instruction
The addiusp instruction uses the pool16d opcode, with bit 0 of the immediate set. The test for the addiusp opcode erroneously did a logical and of the immediate with mm_addiusp_func, which has value 1, so this test always passes when the immediate is non-zero. Fix the test by replacing the logical and with a bitwise and. Fixes: 34c2f668d0f6 ("MIPS: microMIPS: Add unaligned access support.") Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Marcin Nowakowski <marcin.nowakowski@imgtec.com> Cc: Ingo Molnar <mingo@kernel.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/16954/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/mips/kernel/process.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 8374bf40ac77..40200545a3d9 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -326,7 +326,7 @@ static inline int is_sp_move_ins(union mips_instruction *ip)
*/
if (mm_insn_16bit(ip->halfword[1])) {
return (ip->mm16_r3_format.opcode == mm_pool16d_op &&
- ip->mm16_r3_format.simmediate && mm_addiusp_func) ||
+ ip->mm16_r3_format.simmediate & mm_addiusp_func) ||
(ip->mm16_r5_format.opcode == mm_pool16d_op &&
ip->mm16_r5_format.rt == 29);
}