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authorJacob Chen <jacob-chen@iotwrt.com>2017-10-11 09:29:38 +0200
committerHeiko Stuebner <heiko@sntech.de>2017-10-17 20:27:23 +0200
commitec5ccfd7011e341aa5fc3601f71d1a1cd4aef0db (patch)
treeadb878014b5ebdb9c6e761dd8eedc68382baeeae /arch
parentarm64: dts: rockchip: enable cec pin for rk3399 firefly (diff)
downloadlinux-ec5ccfd7011e341aa5fc3601f71d1a1cd4aef0db.tar.xz
linux-ec5ccfd7011e341aa5fc3601f71d1a1cd4aef0db.zip
arm64: dts: rockchip: add RGA device node for RK3399
This patch add the RGA dt config of RK3399 SoC. Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 4403b516d0e3..261d5bf1f248 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1204,6 +1204,17 @@
status = "disabled";
};
+ rga: rga@ff680000 {
+ compatible = "rockchip,rk3399-rga";
+ reg = <0x0 0xff680000 0x0 0x10000>;
+ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA_CORE>;
+ clock-names = "aclk", "hclk", "sclk";
+ resets = <&cru SRST_RGA_CORE>, <&cru SRST_A_RGA>, <&cru SRST_H_RGA>;
+ reset-names = "core", "axi", "ahb";
+ power-domains = <&power RK3399_PD_RGA>;
+ };
+
efuse0: efuse@ff690000 {
compatible = "rockchip,rk3399-efuse";
reg = <0x0 0xff690000 0x0 0x80>;