diff options
author | Shawn Guo <shawn.guo@linaro.org> | 2013-05-03 05:28:42 +0200 |
---|---|---|
committer | Shawn Guo <shawn.guo@linaro.org> | 2013-06-17 10:04:21 +0200 |
commit | 117ccd553a02a69aff41083f8b59a38927ccf002 (patch) | |
tree | dbd862db3d5a53d2bd5cee87956294c77763c5d2 /arch | |
parent | ARM: dts: add device tree source for imx6sl SoC (diff) | |
download | linux-117ccd553a02a69aff41083f8b59a38927ccf002.tar.xz linux-117ccd553a02a69aff41083f8b59a38927ccf002.zip |
ARM: dts: imx6sl: add initial imx6sl-evk support
Add initial imx6sl-evk board support with uart, usdhc and fec enabled.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sl-evk.dts | 74 |
2 files changed, 76 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index f56e599c1773..80a4603857bb 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -121,7 +121,8 @@ dtb-$(CONFIG_ARCH_MXC) += \ imx6q-sabreauto.dtb \ imx6q-sabrelite.dtb \ imx6q-sabresd.dtb \ - imx6q-sbc6x.dtb + imx6q-sbc6x.dtb \ + imx6sl-evk.dtb dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx23-olinuxino.dtb \ imx23-stmp378x_devb.dtb \ diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts new file mode 100644 index 000000000000..2886a590823d --- /dev/null +++ b/arch/arm/boot/dts/imx6sl-evk.dts @@ -0,0 +1,74 @@ +/* + * Copyright (C) 2013 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/dts-v1/; + +#include "imx6sl.dtsi" + +/ { + model = "Freescale i.MX6 SoloLite EVK Board"; + compatible = "fsl,imx6sl-evk", "fsl,imx6sl"; + + memory { + reg = <0x80000000 0x40000000>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec_1>; + phy-mode = "rmii"; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + hog { + pinctrl_hog: hoggrp { + fsl,pins = < + MX6SL_PAD_KEY_ROW7__GPIO4_IO07 0x17059 + MX6SL_PAD_KEY_COL7__GPIO4_IO06 0x17059 + MX6SL_PAD_SD2_DAT7__GPIO5_IO00 0x17059 + MX6SL_PAD_SD2_DAT6__GPIO4_IO29 0x17059 + MX6SL_PAD_REF_CLK_32K__GPIO3_IO22 0x17059 + >; + }; + }; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_1>; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1_1>; + bus-width = <8>; + cd-gpios = <&gpio4 7 0>; + wp-gpios = <&gpio4 6 0>; + status = "okay"; +}; + +&usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_1>; + cd-gpios = <&gpio5 0 0>; + wp-gpios = <&gpio4 29 0>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3_1>; + cd-gpios = <&gpio3 22 0>; + status = "okay"; +}; |