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| author | Haojian Zhuang <haojian.zhuang@marvell.com> | 2009-12-30 16:02:57 +0100 |
|---|---|---|
| committer | Eric Miao <eric.y.miao@gmail.com> | 2010-01-01 08:51:53 +0100 |
| commit | 548c6af4627f4dcb24512a381193206e09bd6d31 (patch) | |
| tree | c9431a3b9bd63292b79cf95bea44940946dc1632 /arch | |
| parent | [ARM] pxa: do not enable L2 after MMU is enabled (diff) | |
| download | linux-548c6af4627f4dcb24512a381193206e09bd6d31.tar.xz linux-548c6af4627f4dcb24512a381193206e09bd6d31.zip | |
[ARM] pxa: enable L2 if present in XSC3
Check whether L2 is present or not in XSC3. If it's present, enable L2
immediately.
Disabling L2 after L2 is enabled that would result in unpredicatable behavior
of XSC3 processor.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mm/proc-xsc3.S | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 96456f548798..8e4f6dca8997 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -407,6 +407,13 @@ __xsc3_setup: adr r5, xsc3_crval ldmia r5, {r5, r6} + +#ifdef CONFIG_CACHE_XSC3L2 + mrc p15, 1, r0, c0, c0, 1 @ get L2 present information + ands r0, r0, #0xf8 + orrne r6, r6, #(1 << 26) @ enable L2 if present +#endif + mrc p15, 0, r0, c1, c0, 0 @ get control register bic r0, r0, r5 @ ..V. ..R. .... ..A. orr r0, r0, r6 @ ..VI Z..S .... .C.M (mmu) |