diff options
| author | James Hogan <james.hogan@imgtec.com> | 2013-01-31 14:27:35 +0100 |
|---|---|---|
| committer | James Hogan <james.hogan@imgtec.com> | 2013-03-02 21:09:58 +0100 |
| commit | c787c2d62fe0c482f5fb3e5b869cd262fe69b244 (patch) | |
| tree | ad3a653e8ce81536a9d2d57976f09a2211de4d80 /arch | |
| parent | metag: kernel/setup.c: sort includes (diff) | |
| download | linux-c787c2d62fe0c482f5fb3e5b869cd262fe69b244.tar.xz linux-c787c2d62fe0c482f5fb3e5b869cd262fe69b244.zip | |
metag: make TXPRIVEXT bits explicit
Define PRIV_BITS using explicit constants from <asm/metag_regs.h> rather
than with a hard coded value. This also adds a couple of missing
definitions for the TXPRIVEXT priv bits for protecting writes to TXTIMER
and the trace registers.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/metag/include/asm/metag_regs.h | 4 | ||||
| -rw-r--r-- | arch/metag/kernel/setup.c | 34 |
2 files changed, 31 insertions, 7 deletions
diff --git a/arch/metag/include/asm/metag_regs.h b/arch/metag/include/asm/metag_regs.h index 022fcad768f7..acf4b8e6e9d1 100644 --- a/arch/metag/include/asm/metag_regs.h +++ b/arch/metag/include/asm/metag_regs.h @@ -414,6 +414,10 @@ #define TXPRIVEXT_REGNUM 29 #define TXPRIVEXT_COPRO_BITS 0xFF000000 /* Co-processor 0-7 */ #define TXPRIVEXT_COPRO_S 24 +#ifndef METAC_1_2 +#define TXPRIVEXT_TXTIMER_BIT 0x00080000 /* TXTIMER priv */ +#define TXPRIVEXT_TRACE_BIT 0x00040000 /* TTEXEC|TTCTRL|GTEXEC */ +#endif #define TXPRIVEXT_TXTRIGGER_BIT 0x00020000 /* TXSTAT|TXMASK|TXPOLL */ #define TXPRIVEXT_TXGBLCREG_BIT 0x00010000 /* Global common regs */ #define TXPRIVEXT_CBPRIV_BIT 0x00008000 /* Mem i/f dump priv */ diff --git a/arch/metag/kernel/setup.c b/arch/metag/kernel/setup.c index aaebc56270ec..dcb1d6d51ce4 100644 --- a/arch/metag/kernel/setup.c +++ b/arch/metag/kernel/setup.c @@ -35,6 +35,7 @@ #include <asm/hwthread.h> #include <asm/l2cache.h> #include <asm/mach/arch.h> +#include <asm/metag_regs.h> #include <asm/mmu.h> #include <asm/mmzone.h> #include <asm/processor.h> @@ -43,18 +44,37 @@ #include <asm/setup.h> #include <asm/traps.h> -/* PRIV protect as many registers as possible. */ -#define DEFAULT_PRIV 0xff0f7f00 - -/* Enable unaligned access checking. */ -#define UNALIGNED_PRIV 0x00000010 +/* Priv protect as many registers as possible. */ +#define DEFAULT_PRIV (TXPRIVEXT_COPRO_BITS | \ + TXPRIVEXT_TXTRIGGER_BIT | \ + TXPRIVEXT_TXGBLCREG_BIT | \ + TXPRIVEXT_ILOCK_BIT | \ + TXPRIVEXT_TXITACCYC_BIT | \ + TXPRIVEXT_TXDIVTIME_BIT | \ + TXPRIVEXT_TXAMAREGX_BIT | \ + TXPRIVEXT_TXTIMERI_BIT | \ + TXPRIVEXT_TXSTATUS_BIT | \ + TXPRIVEXT_TXDISABLE_BIT) + +/* Meta2 specific bits. */ +#ifdef CONFIG_METAG_META12 +#define META2_PRIV 0 +#else +#define META2_PRIV (TXPRIVEXT_TXTIMER_BIT | \ + TXPRIVEXT_TRACE_BIT) +#endif +/* Unaligned access checking bits. */ #ifdef CONFIG_METAG_UNALIGNED -#define PRIV_BITS (DEFAULT_PRIV | UNALIGNED_PRIV) +#define UNALIGNED_PRIV TXPRIVEXT_ALIGNREW_BIT #else -#define PRIV_BITS DEFAULT_PRIV +#define UNALIGNED_PRIV 0 #endif +#define PRIV_BITS (DEFAULT_PRIV | \ + META2_PRIV | \ + UNALIGNED_PRIV) + extern char _heap_start[]; #ifdef CONFIG_METAG_BUILTIN_DTB |