diff options
| author | Andi Kleen <ak@linux.intel.com> | 2015-02-27 18:48:30 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-04-02 17:33:16 +0200 |
| commit | 8882edf735738c949aba4b65d3ec3453066bab12 (patch) | |
| tree | 03672541d9447ef25d53e568cba669dfb2e94ad8 /arch | |
| parent | perf/x86/intel: Make the HT bug workaround conditional on HT enabled (diff) | |
| download | linux-8882edf735738c949aba4b65d3ec3453066bab12.tar.xz linux-8882edf735738c949aba4b65d3ec3453066bab12.zip | |
perf/x86/intel: Reset more state in PMU reset
The PMU reset code didn't quite keep up with newer PMU features.
Improve it a bit to really reset a modern PMU:
- Clear all overflow status
- Clear LBRs and freezing state
- Disable fixed counters too
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1425059312-18217-2-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index 6ea61a572fb0..59994602bb94 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -1538,6 +1538,18 @@ static void intel_pmu_reset(void) if (ds) ds->bts_index = ds->bts_buffer_base; + /* Ack all overflows and disable fixed counters */ + if (x86_pmu.version >= 2) { + intel_pmu_ack_status(intel_pmu_get_status()); + wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0); + } + + /* Reset LBRs and LBR freezing */ + if (x86_pmu.lbr_nr) { + update_debugctlmsr(get_debugctlmsr() & + ~(DEBUGCTLMSR_FREEZE_LBRS_ON_PMI|DEBUGCTLMSR_LBR)); + } + local_irq_restore(flags); } |