diff options
author | Wu Zhangjin <wuzhangjin@gmail.com> | 2009-11-28 07:21:50 +0100 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-12-17 02:57:34 +0100 |
commit | c3d8d85019c9e4f6e4f23d194b6432a2c2464372 (patch) | |
tree | 644e1cf5e7f215fa6789d96bce9fac7e14666846 /arch | |
parent | MIPS: Lemote 2F: Suspend CS5536 MFGPT Timer (diff) | |
download | linux-c3d8d85019c9e4f6e4f23d194b6432a2c2464372.tar.xz linux-c3d8d85019c9e4f6e4f23d194b6432a2c2464372.zip |
MIPS: Loongson: Cleanups of serial port support
This patchs uses a loongson_uart_base variable instead of the
uart_base[] array and adds a new kernel option to avoid to compile
uart_base.c all the time, which will save a little bit of memory for us.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
http://patchwork.linux-mips.org/patch/727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/asm/mach-loongson/loongson.h | 14 | ||||
-rw-r--r-- | arch/mips/loongson/Kconfig | 5 | ||||
-rw-r--r-- | arch/mips/loongson/common/Makefile | 5 | ||||
-rw-r--r-- | arch/mips/loongson/common/init.c | 2 | ||||
-rw-r--r-- | arch/mips/loongson/common/serial.c | 10 | ||||
-rw-r--r-- | arch/mips/loongson/common/uart_base.c | 41 |
6 files changed, 51 insertions, 26 deletions
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h index 06c28f387116..ee8bc8376972 100644 --- a/arch/mips/include/asm/mach-loongson/loongson.h +++ b/arch/mips/include/asm/mach-loongson/loongson.h @@ -31,9 +31,17 @@ extern void __init prom_init_memory(void); extern void __init prom_init_cmdline(void); extern void __init prom_init_machtype(void); extern void __init prom_init_env(void); -extern unsigned long _loongson_uart_base; -extern unsigned long uart8250_base[]; -extern void prom_init_uart_base(void); +#ifdef CONFIG_LOONGSON_UART_BASE +extern unsigned long _loongson_uart_base, loongson_uart_base; +extern void prom_init_loongson_uart_base(void); +#endif + +static inline void prom_init_uart_base(void) +{ +#ifdef CONFIG_LOONGSON_UART_BASE + prom_init_loongson_uart_base(); +#endif +} /* irq operation functions */ extern void bonito_irqdispatch(void); diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig index 7a86987b478f..3df1967dea08 100644 --- a/arch/mips/loongson/Kconfig +++ b/arch/mips/loongson/Kconfig @@ -78,3 +78,8 @@ config LOONGSON_SUSPEND bool default y depends on CPU_SUPPORTS_CPUFREQ && SUSPEND + +config LOONGSON_UART_BASE + bool + default y + depends on EARLY_PRINTK || SERIAL_8250 diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile index 8d71892413df..7668c4de1151 100644 --- a/arch/mips/loongson/common/Makefile +++ b/arch/mips/loongson/common/Makefile @@ -3,13 +3,14 @@ # obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \ - pci.o bonito-irq.o mem.o machtype.o platform.o uart_base.o + pci.o bonito-irq.o mem.o machtype.o platform.o # -# Early printk support +# Serial port support # obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_SERIAL_8250) += serial.o +obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o # # Enable CS5536 Virtual Support Module(VSM) to virtulize the PCI configure diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c index 2b92a23d29dd..a2abd9355737 100644 --- a/arch/mips/loongson/common/init.c +++ b/arch/mips/loongson/common/init.c @@ -31,9 +31,7 @@ void __init prom_init(void) prom_init_memory(); /*init the uart base address */ -#if defined(CONFIG_EARLY_PRINTK) || defined(CONFIG_SERIAL_8250) prom_init_uart_base(); -#endif } void __init prom_free_prom_memory(void) diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson/common/serial.c index ea29db099aee..23b66a5f88cb 100644 --- a/arch/mips/loongson/common/serial.c +++ b/arch/mips/loongson/common/serial.c @@ -57,12 +57,16 @@ static struct platform_device uart8250_device = { static int __init serial_init(void) { - if (uart8250_data[mips_machtype][0].iotype == UPIO_MEM) + unsigned char iotype; + + iotype = uart8250_data[mips_machtype][0].iotype; + + if (UPIO_MEM == iotype) uart8250_data[mips_machtype][0].membase = (void __iomem *)_loongson_uart_base; - else if (uart8250_data[mips_machtype][0].iotype == UPIO_PORT) + else if (UPIO_PORT == iotype) uart8250_data[mips_machtype][0].iobase = - uart8250_base[mips_machtype] - LOONGSON_PCIIO_BASE; + loongson_uart_base - LOONGSON_PCIIO_BASE; uart8250_device.dev.platform_data = uart8250_data[mips_machtype]; diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson/common/uart_base.c index 1d636f4f7505..78ff66ae749e 100644 --- a/arch/mips/loongson/common/uart_base.c +++ b/arch/mips/loongson/common/uart_base.c @@ -13,24 +13,33 @@ #include <loongson.h> -unsigned long __maybe_unused _loongson_uart_base; +/* ioremapped */ +unsigned long _loongson_uart_base; EXPORT_SYMBOL(_loongson_uart_base); +/* raw */ +unsigned long loongson_uart_base; +EXPORT_SYMBOL(loongson_uart_base); -unsigned long __maybe_unused uart8250_base[] = { - [MACH_LOONGSON_UNKNOWN] 0, - [MACH_LEMOTE_FL2E] (LOONGSON_PCIIO_BASE + 0x3f8), - [MACH_LEMOTE_FL2F] (LOONGSON_PCIIO_BASE + 0x2f8), - [MACH_LEMOTE_ML2F7] (LOONGSON_LIO1_BASE + 0x3f8), - [MACH_LEMOTE_YL2F89] (LOONGSON_LIO1_BASE + 0x3f8), - [MACH_DEXXON_GDIUM2F10] (LOONGSON_LIO1_BASE + 0x3f8), - [MACH_LEMOTE_NAS] (LOONGSON_LIO1_BASE + 0x3f8), - [MACH_LEMOTE_LL2F] (LOONGSON_PCIIO_BASE + 0x2f8), - [MACH_LOONGSON_END] 0, -}; -EXPORT_SYMBOL(uart8250_base); - -void __maybe_unused prom_init_uart_base(void) +void prom_init_loongson_uart_base(void) { + switch (mips_machtype) { + case MACH_LEMOTE_FL2E: + loongson_uart_base = LOONGSON_PCIIO_BASE + 0x3f8; + break; + case MACH_LEMOTE_FL2F: + case MACH_LEMOTE_LL2F: + loongson_uart_base = LOONGSON_PCIIO_BASE + 0x2f8; + break; + case MACH_LEMOTE_ML2F7: + case MACH_LEMOTE_YL2F89: + case MACH_DEXXON_GDIUM2F10: + case MACH_LEMOTE_NAS: + default: + /* The CPU provided serial port */ + loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8; + break; + } + _loongson_uart_base = - (unsigned long)ioremap_nocache(uart8250_base[mips_machtype], 8); + (unsigned long)ioremap_nocache(loongson_uart_base, 8); } |