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author | David Daney <david.daney@cavium.com> | 2015-01-15 14:11:06 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2015-02-20 15:28:51 +0100 |
commit | d6e41525e356a8dc4b9ad6249a644d4123240881 (patch) | |
tree | a275601c4a4283de4494999f0520e91a3746fc3a /arch | |
parent | MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs (diff) | |
download | linux-d6e41525e356a8dc4b9ad6249a644d4123240881.tar.xz linux-d6e41525e356a8dc4b9ad6249a644d4123240881.zip |
MIPS: OCTEON: Fix FP context save.
It wasn't being saved on task switch.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8934/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/kernel/octeon_switch.S | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel/octeon_switch.S index 3dec1e8becf0..2787c014ec56 100644 --- a/arch/mips/kernel/octeon_switch.S +++ b/arch/mips/kernel/octeon_switch.S @@ -31,15 +31,11 @@ /* * check if we need to save FPU registers */ - PTR_L t3, TASK_THREAD_INFO(a0) - LONG_L t0, TI_FLAGS(t3) - li t1, _TIF_USEDFPU - and t2, t0, t1 - beqz t2, 1f - nor t1, zero, t1 - - and t0, t0, t1 - LONG_S t0, TI_FLAGS(t3) + .set push + .set noreorder + beqz a3, 1f + PTR_L t3, TASK_THREAD_INFO(a0) + .set pop /* * clear saved user stack CU1 bit @@ -57,14 +53,13 @@ 1: /* check if we need to save COP2 registers */ - PTR_L t2, TASK_THREAD_INFO(a0) - LONG_L t0, ST_OFF(t2) + LONG_L t0, ST_OFF(t3) bbit0 t0, 30, 1f /* Disable COP2 in the stored process state */ li t1, ST0_CU2 xor t0, t1 - LONG_S t0, ST_OFF(t2) + LONG_S t0, ST_OFF(t3) /* Enable COP2 so we can save it */ mfc0 t0, CP0_STATUS |