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| author | Josh Poimboeuf <jpoimboe@kernel.org> | 2022-06-14 23:16:06 +0200 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2022-06-27 10:34:00 +0200 |
| commit | e6aa13622ea8283cc699cac5d018cc40a2ba2010 (patch) | |
| tree | 7a189ef16a3c7e33668cf1fadaa2778643b5d26b /arch | |
| parent | x86/speculation: Fix RSB filling with CONFIG_RETPOLINE=n (diff) | |
| download | linux-e6aa13622ea8283cc699cac5d018cc40a2ba2010.tar.xz linux-e6aa13622ea8283cc699cac5d018cc40a2ba2010.zip | |
x86/speculation: Fix firmware entry SPEC_CTRL handling
The firmware entry code may accidentally clear STIBP or SSBD. Fix that.
Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/x86/include/asm/nospec-branch.h | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h index 08b03c12e6c2..dee9ef77af13 100644 --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -285,18 +285,16 @@ extern u64 spec_ctrl_current(void); */ #define firmware_restrict_branch_speculation_start() \ do { \ - u64 val = x86_spec_ctrl_base | SPEC_CTRL_IBRS; \ - \ preempt_disable(); \ - alternative_msr_write(MSR_IA32_SPEC_CTRL, val, \ + alternative_msr_write(MSR_IA32_SPEC_CTRL, \ + spec_ctrl_current() | SPEC_CTRL_IBRS, \ X86_FEATURE_USE_IBRS_FW); \ } while (0) #define firmware_restrict_branch_speculation_end() \ do { \ - u64 val = x86_spec_ctrl_base; \ - \ - alternative_msr_write(MSR_IA32_SPEC_CTRL, val, \ + alternative_msr_write(MSR_IA32_SPEC_CTRL, \ + spec_ctrl_current(), \ X86_FEATURE_USE_IBRS_FW); \ preempt_enable(); \ } while (0) |