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authorChristophe Leroy <christophe.leroy@c-s.fr>2019-06-14 08:41:45 +0200
committerMichael Ellerman <mpe@ellerman.id.au>2019-07-04 18:06:37 +0200
commit647d5ed0ae8a9942de8615f33790be7ac940056c (patch)
treedcd9b2570e0e58acb4820d0e6b1bb574d2b5ff80 /arch
parentpowerpc/8xx: refactor programming of microcode CPM params. (diff)
downloadlinux-647d5ed0ae8a9942de8615f33790be7ac940056c.tar.xz
linux-647d5ed0ae8a9942de8615f33790be7ac940056c.zip
powerpc/8xx: replace #ifdefs by IS_ENABLED() in microcode.c
Reduce #ifdef mess by using IS_ENABLED() instead. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/8xx/micropatch.c33
1 files changed, 13 insertions, 20 deletions
diff --git a/arch/powerpc/platforms/8xx/micropatch.c b/arch/powerpc/platforms/8xx/micropatch.c
index 2fdd8f935501..0bb51531323e 100644
--- a/arch/powerpc/platforms/8xx/micropatch.c
+++ b/arch/powerpc/platforms/8xx/micropatch.c
@@ -244,14 +244,9 @@ static void __init cpm_write_patch(cpm8xx_t *cp, int offset, uint *patch, int le
void __init cpm_load_patch(cpm8xx_t *cp)
{
volatile cpm8xx_t *commproc;
-#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
- defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
volatile iic_t *iip;
volatile struct spi_pram *spp;
-#ifdef CONFIG_I2C_SPI_SMC1_UCODE_PATCH
volatile smc_uart_t *smp;
-#endif
-#endif
commproc = cp;
commproc->cp_rccr = 0;
@@ -260,24 +255,22 @@ void __init cpm_load_patch(cpm8xx_t *cp)
cpm_write_patch(cp, 0xf00, patch_2f00, sizeof(patch_2f00));
cpm_write_patch(cp, 0xe00, patch_2e00, sizeof(patch_2e00));
-#if defined(CONFIG_I2C_SPI_UCODE_PATCH) || \
- defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
-
- iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
-# define RPBASE 0x0500
- iip->iic_rpbase = RPBASE;
+ if (IS_ENABLED(CONFIG_I2C_SPI_UCODE_PATCH) ||
+ IS_ENABLED(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)) {
+ u16 rpbase = 0x500;
- /* Put SPI above the IIC, also 32-byte aligned.
- */
- spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
- spp->rpbase = (RPBASE + sizeof(iic_t) + 31) & ~31;
+ iip = (iic_t *)&commproc->cp_dparam[PROFF_IIC];
+ iip->iic_rpbase = rpbase;
-# if defined(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
- smp = (smc_uart_t *)&commproc->cp_dparam[PROFF_SMC1];
- smp->smc_rpbase = 0x1FC0;
-# endif /* CONFIG_I2C_SPI_SMC1_UCODE_PATCH) */
+ /* Put SPI above the IIC, also 32-byte aligned. */
+ spp = (struct spi_pram *)&commproc->cp_dparam[PROFF_SPI];
+ spp->rpbase = (rpbase + sizeof(iic_t) + 31) & ~31;
-#endif /* some variation of the I2C/SPI patch was selected */
+ if (IS_ENABLED(CONFIG_I2C_SPI_SMC1_UCODE_PATCH)) {
+ smp = (smc_uart_t *)&commproc->cp_dparam[PROFF_SMC1];
+ smp->smc_rpbase = 0x1FC0;
+ }
+ }
commproc->cp_cpmcr1 = patch_params.cpmcr1;
commproc->cp_cpmcr2 = patch_params.cpmcr2;