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author | Vasant Hegde <vasant.hegde@amd.com> | 2023-11-22 10:02:15 +0100 |
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committer | Joerg Roedel <jroedel@suse.de> | 2023-12-11 15:25:38 +0100 |
commit | c7fc12354be0ba47566d55f4ebdc6a47bd69d5ed (patch) | |
tree | 16ba23e4cdadbcc35a195b922ef0b80e733dc044 /arch | |
parent | iommu/amd: Make domain_flush_pages as global function (diff) | |
download | linux-c7fc12354be0ba47566d55f4ebdc6a47bd69d5ed.tar.xz linux-c7fc12354be0ba47566d55f4ebdc6a47bd69d5ed.zip |
iommu/amd/pgtbl_v2: Invalidate updated page ranges only
Enhance __domain_flush_pages() to detect domain page table mode and use
that info to build invalidation commands. So that we can use
amd_iommu_domain_flush_pages() to invalidate v2 page table.
Also pass PASID, gn variable to device_flush_iotlb() so that it can build
IOTLB invalidation command for both v1 and v2 page table.
Signed-off-by: Vasant Hegde <vasant.hegde@amd.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Link: https://lore.kernel.org/r/20231122090215.6191-10-vasant.hegde@amd.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions