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authorThierry Reding <treding@nvidia.com>2015-04-29 13:53:21 +0200
committerThierry Reding <treding@nvidia.com>2015-05-04 13:25:19 +0200
commit5431b0fdadfec7aa61c916d6978544727a00b5fe (patch)
tree232525a3aed1842d685074d6531f2814caa5ca4a /arch
parentLinux 4.1-rc1 (diff)
downloadlinux-5431b0fdadfec7aa61c916d6978544727a00b5fe.tar.xz
linux-5431b0fdadfec7aa61c916d6978544727a00b5fe.zip
ARM: tegra: Use lower-case hexadecimal digits
For consistency with other device tree content, use lower-case hexadecimal digits in register region specifications. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/tegra124.dtsi2
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index cf01c818b8ea..0d9f9ae73149 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -300,7 +300,7 @@
apbmisc@0,70000800 {
compatible = "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x0 0x70000800 0x0 0x64>, /* Chip revision */
- <0x0 0x7000E864 0x0 0x04>; /* Strapping options */
+ <0x0 0x7000e864 0x0 0x04>; /* Strapping options */
};
pinmux: pinmux@0,70000868 {
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index adf6b048d0bb..f444b67f55c6 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -563,7 +563,7 @@
fuse@7000f800 {
compatible = "nvidia,tegra20-efuse";
- reg = <0x7000F800 0x400>;
+ reg = <0x7000f800 0x400>;
clocks = <&tegra_car TEGRA20_CLK_FUSE>;
clock-names = "fuse";
resets = <&tegra_car 39>;