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author | Sean Anderson <sean.anderson@seco.com> | 2021-08-26 21:21:53 +0200 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-09-14 10:05:32 +0200 |
commit | 8517b62e0a28f474aeeb05dcadf0466965595550 (patch) | |
tree | f82c3789f639f1c7d36fbfe4961cf56f404f8b24 /arch | |
parent | dt-bindings: serial: uartlite: Add properties for synthesis-time parameters (diff) | |
download | linux-8517b62e0a28f474aeeb05dcadf0466965595550.tar.xz linux-8517b62e0a28f474aeeb05dcadf0466965595550.zip |
sh: j2: Update uartlite binding with data and parity properties
These properties are necessary for properly calculating the uart
timeout. I inspected the J2 source code, and believe these values to be
correct.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Link: https://lore.kernel.org/r/20210826192154.3202269-4-sean.anderson@seco.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/sh/boot/dts/j2_mimas_v2.dts | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts index 9f4742fab329..fa9562f78d53 100644 --- a/arch/sh/boot/dts/j2_mimas_v2.dts +++ b/arch/sh/boot/dts/j2_mimas_v2.dts @@ -88,6 +88,8 @@ clock-frequency = <125000000>; compatible = "xlnx,xps-uartlite-1.00.a"; current-speed = <19200>; + xlnx,use-parity = <0>; + xlnx,data-bits = <8>; device_type = "serial"; interrupts = <0x12>; port-number = <0>; |