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authorWen He <wen.he_1@nxp.com>2019-12-13 09:34:02 +0100
committerStephen Boyd <sboyd@kernel.org>2020-01-31 01:28:07 +0100
commitd37010a3c162f23e47a11a8f5946dbd974999c42 (patch)
treec88cfd4d84af3241ddfd743948f6b432aead903a /arch
parentdt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings (diff)
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clk: ls1028a: Add clock driver for Display output interface
Add clock driver for QorIQ LS1028A Display output interfaces(LCD, DPHY), as implemented in TSMC CLN28HPM PLL, this PLL supports the programmable integer division and range of the display output pixel clock's 27-594MHz. Signed-off-by: Wen He <wen.he_1@nxp.com> Signed-off-by: Michael Walle <michael@walle.cc> Link: https://lkml.kernel.org/r/20191213083402.35678-2-wen.he_1@nxp.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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