summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorMark James <maj@jamers.net>2015-03-17 22:35:23 +0100
committerDinh Nguyen <dinguyen@opensource.altera.com>2015-03-19 16:51:15 +0100
commit1ac31de744202a3a14601170a57f155b4a8d2c21 (patch)
treeb3bd30904c606c8a99811c787e8243433bfc7e99 /arch
parentLinux 4.0-rc4 (diff)
downloadlinux-1ac31de744202a3a14601170a57f155b4a8d2c21.tar.xz
linux-1ac31de744202a3a14601170a57f155b4a8d2c21.zip
ARM: socfpga: dts: fix spi1 interrupt
The socfpga.dtsi currently has the wrong interrupt number set for SPI master 1 Trying to use the master without this change results in the kernel boot process waiting forever for an interrupt that will never occur while attempting to probe any slave devices configured in the device tree as being under SPI master 1. The change works for the Cyclone V, and according to the Arria 5 handbook should be good there too. Signed-off-by: Mark James <maj@jamers.net> Acked-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/socfpga.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 9d8760956752..d9176e606173 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -660,7 +660,7 @@
#address-cells = <1>;
#size-cells = <0>;
reg = <0xfff01000 0x1000>;
- interrupts = <0 156 4>;
+ interrupts = <0 155 4>;
num-cs = <4>;
clocks = <&spi_m_clk>;
status = "disabled";