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authorKyle McMartin <kyle@parisc-linux.org>2006-08-14 02:37:26 +0200
committerMatthew Wilcox <willy@parisc-linux.org>2006-10-04 14:44:58 +0200
commit32104b29cdf93f78ac37e681bd4547413466d13c (patch)
tree4b058cad9227dd960da79daf94235517690f9197 /arch
parent[PARISC] Untangle <asm/processor.h> header include mess (diff)
downloadlinux-32104b29cdf93f78ac37e681bd4547413466d13c.tar.xz
linux-32104b29cdf93f78ac37e681bd4547413466d13c.zip
[PARISC] PA7200 also supports prefetch for read
It seems PA7200 processors also suppress traps on loads to %r0. This means we can prefetch for read on these cpus. Of course, we can't support prefetch for write, since that requires LOAD DOUBLEWORD which was added with PA2.0 Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/parisc/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig
index 6dd0ea8f88e0..d2101237442e 100644
--- a/arch/parisc/Kconfig
+++ b/arch/parisc/Kconfig
@@ -127,7 +127,7 @@ config PA11
config PREFETCH
def_bool y
- depends on PA8X00
+ depends on PA8X00 || PA7200
config 64BIT
bool "64-bit kernel"