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| author | Mark Brown <broonie@kernel.org> | 2022-07-04 19:02:36 +0200 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2022-07-05 12:45:45 +0200 |
| commit | 9105a295d6f507bac733d9681c15c418d5db8aee (patch) | |
| tree | 3aa5ba3b9cfce73b5306588c45fab91a1aa71f49 /arch | |
| parent | arm64/cpuinfo: Remove references to reserved cache type (diff) | |
| download | linux-9105a295d6f507bac733d9681c15c418d5db8aee.tar.xz linux-9105a295d6f507bac733d9681c15c418d5db8aee.zip | |
arm64/idreg: Fix tab/space damage
Quite a few of the overrides in idreg-override.c have a mix of tabs and
spaces in their definitions, fix these.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20220704170302.2609529-3-broonie@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm64/kernel/idreg-override.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c index 8a2ceb591686..b797f232ebcd 100644 --- a/arch/arm64/kernel/idreg-override.c +++ b/arch/arm64/kernel/idreg-override.c @@ -53,7 +53,7 @@ static const struct ftr_set_desc pfr1 __initconst = { .name = "id_aa64pfr1", .override = &id_aa64pfr1_override, .fields = { - { "bt", ID_AA64PFR1_BT_SHIFT }, + { "bt", ID_AA64PFR1_BT_SHIFT }, { "mte", ID_AA64PFR1_MTE_SHIFT}, {} }, @@ -63,10 +63,10 @@ static const struct ftr_set_desc isar1 __initconst = { .name = "id_aa64isar1", .override = &id_aa64isar1_override, .fields = { - { "gpi", ID_AA64ISAR1_GPI_SHIFT }, - { "gpa", ID_AA64ISAR1_GPA_SHIFT }, - { "api", ID_AA64ISAR1_API_SHIFT }, - { "apa", ID_AA64ISAR1_APA_SHIFT }, + { "gpi", ID_AA64ISAR1_GPI_SHIFT }, + { "gpa", ID_AA64ISAR1_GPA_SHIFT }, + { "api", ID_AA64ISAR1_API_SHIFT }, + { "apa", ID_AA64ISAR1_APA_SHIFT }, {} }, }; @@ -75,8 +75,8 @@ static const struct ftr_set_desc isar2 __initconst = { .name = "id_aa64isar2", .override = &id_aa64isar2_override, .fields = { - { "gpa3", ID_AA64ISAR2_GPA3_SHIFT }, - { "apa3", ID_AA64ISAR2_APA3_SHIFT }, + { "gpa3", ID_AA64ISAR2_GPA3_SHIFT }, + { "apa3", ID_AA64ISAR2_APA3_SHIFT }, {} }, }; |