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| author | Sohil Mehta <sohil.mehta@intel.com> | 2017-12-20 20:59:27 +0100 |
|---|---|---|
| committer | Joerg Roedel <jroedel@suse.de> | 2018-01-17 15:02:50 +0100 |
| commit | 2f13eb7c580fcbe3d73ebbe6fb1841381cad0a05 (patch) | |
| tree | 9c8c8de8d4b40a3b81e8515f1baef0ac72f1c4bd /arch | |
| parent | iommu/vt-d: Add a check for 5-level paging support (diff) | |
| download | linux-2f13eb7c580fcbe3d73ebbe6fb1841381cad0a05.tar.xz linux-2f13eb7c580fcbe3d73ebbe6fb1841381cad0a05.zip | |
iommu/vt-d: Enable 5-level paging mode in the PASID entry
If the CPU has support for 5-level paging enabled and the IOMMU also
supports 5-level paging then enable the 5-level paging mode for first-
level translations - used when SVM is enabled.
Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Diffstat (limited to 'arch')
0 files changed, 0 insertions, 0 deletions