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| author | Alistair Francis <alistair.francis@wdc.com> | 2019-08-14 01:32:29 +0200 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-08-14 04:26:38 +0200 |
| commit | 500bc2c1f48aa6efad9474fdbe0c7cd8d600484c (patch) | |
| tree | 68fe90c21b1c43ab61aed865ace7758be741f1fe /arch | |
| parent | riscv: fix flush_tlb_range() end address for flush_tlb_page() (diff) | |
| download | linux-500bc2c1f48aa6efad9474fdbe0c7cd8d600484c.tar.xz linux-500bc2c1f48aa6efad9474fdbe0c7cd8d600484c.zip | |
riscv: rv32_defconfig: Update the defconfig
Update the rv32_defconfig:
- Add 'CONFIG_DEVTMPFS_MOUNT=y' to match the RISC-V defconfig
- Add CONFIG_HW_RANDOM=y and CONFIG_HW_RANDOM_VIRTIO=y to enable
VirtIORNG when running on QEMU
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/configs/rv32_defconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index d5449ef805a3..7da93e494445 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -34,6 +34,7 @@ CONFIG_PCIEPORTBUS=y CONFIG_PCI_HOST_GENERIC=y CONFIG_PCIE_XILINX=y CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y CONFIG_BLK_DEV_LOOP=y CONFIG_VIRTIO_BLK=y CONFIG_BLK_DEV_SD=y @@ -53,6 +54,8 @@ CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_EARLYCON_RISCV_SBI=y CONFIG_HVC_RISCV_SBI=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_VIRTIO=y # CONFIG_PTP_1588_CLOCK is not set CONFIG_DRM=y CONFIG_DRM_RADEON=y |