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author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-06-23 13:29:05 +0200 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-08-11 17:56:53 +0200 |
commit | 76ad33e1b95f3db7a2fb6c3141dc82a8d05f80dc (patch) | |
tree | 8a355d0ef979b927d1abce01346e8369d61d6b2b /arch | |
parent | arch/riscv: add Zihintpause support (diff) | |
download | linux-76ad33e1b95f3db7a2fb6c3141dc82a8d05f80dc.tar.xz linux-76ad33e1b95f3db7a2fb6c3141dc82a8d05f80dc.zip |
riscv: traps_misaligned: do not duplicate stringify
Use existing stringify macro from the kernel headers.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20220623112905.253157-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/riscv/kernel/traps_misaligned.c | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/riscv/kernel/traps_misaligned.c b/arch/riscv/kernel/traps_misaligned.c index 46c4dafe3ba0..378f5b151443 100644 --- a/arch/riscv/kernel/traps_misaligned.c +++ b/arch/riscv/kernel/traps_misaligned.c @@ -7,6 +7,7 @@ #include <linux/mm.h> #include <linux/module.h> #include <linux/irq.h> +#include <linux/stringify.h> #include <asm/processor.h> #include <asm/ptrace.h> @@ -150,9 +151,6 @@ #define PRECISION_S 0 #define PRECISION_D 1 -#define STR(x) XSTR(x) -#define XSTR(x) #x - #define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \ static inline type load_##type(const type *addr) \ { \ @@ -207,9 +205,9 @@ static inline ulong get_insn(ulong mepc) asm ("and %[tmp], %[addr], 2\n" "bnez %[tmp], 1f\n" #if defined(CONFIG_64BIT) - STR(LWU) " %[insn], (%[addr])\n" + __stringify(LWU) " %[insn], (%[addr])\n" #else - STR(LW) " %[insn], (%[addr])\n" + __stringify(LW) " %[insn], (%[addr])\n" #endif "and %[tmp], %[insn], %[rvc_mask]\n" "beq %[tmp], %[rvc_mask], 2f\n" |