summaryrefslogtreecommitdiffstats
path: root/arch
diff options
context:
space:
mode:
authorHiroshi DOYU <hdoyu@nvidia.com>2012-05-10 09:42:30 +0200
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2012-05-10 23:43:53 +0200
commitc542fb79fba4c63aa6e2a27f90373b0516614eca (patch)
tree19847b29ef6202717dfc8132a575b04214efdbd0 /arch
parentprintk() - restore timestamp printing at console output (diff)
downloadlinux-c542fb79fba4c63aa6e2a27f90373b0516614eca.tar.xz
linux-c542fb79fba4c63aa6e2a27f90373b0516614eca.zip
ARM: tegra20: Add Tegra Memory Controller(MC) driver
Tegra Memory Controller(MC) driver for Tegra20 Added to support MC General interrupts, mainly for IOMMU(GART). Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-tegra/Kconfig2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index d0f2546706ca..0e4e502ad448 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -20,6 +20,8 @@ config ARCH_TEGRA_2x_SOC
select PL310_ERRATA_727915 if CACHE_L2X0
select PL310_ERRATA_769419 if CACHE_L2X0
select CPU_FREQ_TABLE if CPU_FREQ
+ select MEMORY
+ select TEGRA20_MC
help
Support for NVIDIA Tegra AP20 and T20 processors, based on the
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller