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authorDmitry Eremin-Solenikov <dbaryshkov@gmail.com>2015-01-15 03:06:22 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-01-29 16:24:53 +0100
commite461894dc2ce7778ccde1c3483c9b15a85a7fc5f (patch)
treefbf2370faf9eb9169246aa4f448ac205808c9a0c /arch
parentARM: 8283/1: sa1100: collie: clear PWER register on machine init (diff)
downloadlinux-e461894dc2ce7778ccde1c3483c9b15a85a7fc5f.tar.xz
linux-e461894dc2ce7778ccde1c3483c9b15a85a7fc5f.zip
ARM: 8284/1: sa1100: clear RCSR_SMR on resume
StrongARM core uses RCSR SMR bit to tell to bootloader that it was reset by entering the sleep mode. After we have resumed, there is little point in having that bit enabled. Moreover, if this bit is set before reboot, the bootloader can become confused. Thus clear the SMR bit on resume just before clearing the scratchpad (resume address) register. Cc: stable@vger.kernel.org Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-sa1100/pm.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-sa1100/pm.c b/arch/arm/mach-sa1100/pm.c
index 6645d1e31f14..34853d5dfda2 100644
--- a/arch/arm/mach-sa1100/pm.c
+++ b/arch/arm/mach-sa1100/pm.c
@@ -81,6 +81,7 @@ static int sa11x0_pm_enter(suspend_state_t state)
/*
* Ensure not to come back here if it wasn't intended
*/
+ RCSR = RCSR_SMR;
PSPR = 0;
/*