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author | Xiubo Li <Li.Xiubo@freescale.com> | 2014-11-24 10:17:24 +0100 |
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committer | Shawn Guo <shawn.guo@linaro.org> | 2014-12-29 12:22:12 +0100 |
commit | 4fe6be0fe0c8bec2fdeafe11e7202679cd68e0b2 (patch) | |
tree | d10ab2aa9288d294bf5a9e11f435a11e7cc123df /arch | |
parent | Linux 3.19-rc1 (diff) | |
download | linux-4fe6be0fe0c8bec2fdeafe11e7202679cd68e0b2.tar.xz linux-4fe6be0fe0c8bec2fdeafe11e7202679cd68e0b2.zip |
ARM: ls1021a: dtsi: add 'big-endian' property for scfg node
On LS1021A SoC, the scfg device is in BE mode.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/arm/boot/dts/ls1021a.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 657da14cb4b5..c70bb27ac65a 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -142,6 +142,7 @@ scfg: scfg@1570000 { compatible = "fsl,ls1021a-scfg", "syscon"; reg = <0x0 0x1570000 0x0 0x10000>; + big-endian; }; clockgen: clocking@1ee1000 { |