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| author | William Zhang <william.zhang@broadcom.com> | 2022-08-01 21:44:47 +0200 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2022-08-15 18:35:53 +0200 |
| commit | ed93a068f3b3ac22423edfaf8509eaafedf3efc0 (patch) | |
| tree | 0a86e4d9252d2e7943978bdf1226d131b7dccbc4 /arch | |
| parent | ARM: dts: bcmbca: bcm63178: clean up psci node (diff) | |
| download | linux-ed93a068f3b3ac22423edfaf8509eaafedf3efc0.tar.xz linux-ed93a068f3b3ac22423edfaf8509eaafedf3efc0.zip | |
ARM: dts: bcmbca: bcm63178: fix interrupt controller node
Add the missing gic registers and interrupts property to the gic node.
Fixes: fc85b7e64acb ("ARM: dts: add dts files for bcmbca soc 63178")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220801194448.29363-3-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/boot/dts/bcm63178.dtsi | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi index 98ab10e1c81e..dba71fa53466 100644 --- a/arch/arm/boot/dts/bcm63178.dtsi +++ b/arch/arm/boot/dts/bcm63178.dtsi @@ -86,15 +86,17 @@ compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x81000000 0x4000>; + ranges = <0 0x81000000 0x8000>; gic: interrupt-controller@1000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; - #address-cells = <0>; interrupt-controller; + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(3) | IRQ_TYPE_LEVEL_HIGH)>; reg = <0x1000 0x1000>, - <0x2000 0x2000>; + <0x2000 0x2000>, + <0x4000 0x2000>, + <0x6000 0x2000>; }; }; |