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authorRobert Richter <robert.richter@amd.com>2010-01-28 18:05:26 +0100
committerRobert Richter <robert.richter@amd.com>2010-02-26 15:13:55 +0100
commit013cfc50672bbb638796545231683231647edb07 (patch)
tree447341fdc02e9ae26540123c5139f06a4186c66f /arch
parentoprofile: remove EXPERIMENTAL from the config option description (diff)
downloadlinux-013cfc50672bbb638796545231683231647edb07.tar.xz
linux-013cfc50672bbb638796545231683231647edb07.zip
oprofile/x86: remove OPROFILE_IBS config option
OProfile support for IBS is now for several versions in the kernel. The feature is stable now and the code can be activated permanently. As a side effect IBS now works also on nosmp configs. Signed-off-by: Robert Richter <robert.richter@amd.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/Kconfig14
-rw-r--r--arch/x86/oprofile/op_model_amd.c31
2 files changed, 1 insertions, 44 deletions
diff --git a/arch/Kconfig b/arch/Kconfig
index d67787241813..06a13729c8df 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -15,20 +15,6 @@ config OPROFILE
If unsure, say N.
-config OPROFILE_IBS
- bool "OProfile AMD IBS support (EXPERIMENTAL)"
- default n
- depends on OPROFILE && SMP && X86
- help
- Instruction-Based Sampling (IBS) is a new profiling
- technique that provides rich, precise program performance
- information. IBS is introduced by AMD Family10h processors
- (AMD Opteron Quad-Core processor "Barcelona") to overcome
- the limitations of conventional performance counter
- sampling.
-
- If unsure, say N.
-
config OPROFILE_EVENT_MULTIPLEX
bool "OProfile multiplexing support (EXPERIMENTAL)"
default n
diff --git a/arch/x86/oprofile/op_model_amd.c b/arch/x86/oprofile/op_model_amd.c
index 39686c29f03a..2b9c68d868ed 100644
--- a/arch/x86/oprofile/op_model_amd.c
+++ b/arch/x86/oprofile/op_model_amd.c
@@ -22,6 +22,7 @@
#include <asm/ptrace.h>
#include <asm/msr.h>
#include <asm/nmi.h>
+#include <asm/apic.h>
#include "op_x86_model.h"
#include "op_counter.h"
@@ -43,8 +44,6 @@
static unsigned long reset_value[NUM_VIRT_COUNTERS];
-#ifdef CONFIG_OPROFILE_IBS
-
/* IbsFetchCtl bits/masks */
#define IBS_FETCH_RAND_EN (1ULL<<57)
#define IBS_FETCH_VAL (1ULL<<49)
@@ -72,8 +71,6 @@ struct op_ibs_config {
static struct op_ibs_config ibs_config;
-#endif
-
#ifdef CONFIG_OPROFILE_EVENT_MULTIPLEX
static void op_mux_fill_in_addresses(struct op_msrs * const msrs)
@@ -185,8 +182,6 @@ static void op_amd_setup_ctrs(struct op_x86_model_spec const *model,
}
}
-#ifdef CONFIG_OPROFILE_IBS
-
static inline void
op_amd_handle_ibs(struct pt_regs * const regs,
struct op_msrs const * const msrs)
@@ -272,15 +267,6 @@ static void op_amd_stop_ibs(void)
wrmsrl(MSR_AMD64_IBSOPCTL, 0);
}
-#else
-
-static inline void op_amd_handle_ibs(struct pt_regs * const regs,
- struct op_msrs const * const msrs) { }
-static inline void op_amd_start_ibs(void) { }
-static inline void op_amd_stop_ibs(void) { }
-
-#endif
-
static int op_amd_check_ctrs(struct pt_regs * const regs,
struct op_msrs const * const msrs)
{
@@ -355,8 +341,6 @@ static void op_amd_shutdown(struct op_msrs const * const msrs)
}
}
-#ifdef CONFIG_OPROFILE_IBS
-
static u8 ibs_eilvt_off;
static inline void apic_init_ibs_nmi_per_cpu(void *arg)
@@ -507,19 +491,6 @@ static void op_amd_exit(void)
ibs_exit();
}
-#else
-
-/* no IBS support */
-
-static int op_amd_init(struct oprofile_operations *ops)
-{
- return 0;
-}
-
-static void op_amd_exit(void) {}
-
-#endif /* CONFIG_OPROFILE_IBS */
-
struct op_x86_model_spec op_amd_spec = {
.num_counters = NUM_COUNTERS,
.num_controls = NUM_CONTROLS,