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authorChen-Yu Tsai <wens@csie.org>2020-01-14 10:42:52 +0100
committerMaxime Ripard <maxime@cerno.tech>2020-02-10 08:58:02 +0100
commitbd8cac5fb8b8fb2bc80203cb444ecf5f5e2bd9e3 (patch)
treeccd4a6052876af41b421da22efcbef34d791e9ff /arch
parentLinux 5.6-rc1 (diff)
downloadlinux-bd8cac5fb8b8fb2bc80203cb444ecf5f5e2bd9e3.tar.xz
linux-bd8cac5fb8b8fb2bc80203cb444ecf5f5e2bd9e3.zip
ARM: dts: sun8i: a83t: Fix incorrect clk and reset macros for EMAC device
When the raw numbers used for clk and reset indices in the EMAC device node were converted to the new macros, the order of the clk and reset properties was overlooked, and thus the incorrect macros were used. This results in the EMAC being non-responsive, as well as an oops due to incorrect usage of the reset control. Correct the macro types, and also reorder the clk and reset properties to match all the other device nodes. Fixes: 765866edb16a ("ARM: dts: sunxi: Use macros for references to CCU clocks") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/sun8i-a83t.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 74ac7ee9383c..e7b9bef1be6b 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -1006,10 +1006,10 @@
reg = <0x01c30000 0x104>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
- resets = <&ccu CLK_BUS_EMAC>;
- reset-names = "stmmaceth";
- clocks = <&ccu RST_BUS_EMAC>;
+ clocks = <&ccu CLK_BUS_EMAC>;
clock-names = "stmmaceth";
+ resets = <&ccu RST_BUS_EMAC>;
+ reset-names = "stmmaceth";
status = "disabled";
mdio: mdio {