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authorFabio Estevam <fabio.estevam@freescale.com>2013-09-27 16:12:41 +0200
committerShawn Guo <shawn.guo@linaro.org>2013-09-29 09:37:40 +0200
commitc5f592d1cb64cb46b2bb1ac54734c1247fd1331b (patch)
tree205d9349f8b086ba9ae025ade14dded4e241c1b8 /arch
parentARM: dts: imx6q-sabrelite: Add ethernet phy reset pin into hog (diff)
downloadlinux-c5f592d1cb64cb46b2bb1ac54734c1247fd1331b.tar.xz
linux-c5f592d1cb64cb46b2bb1ac54734c1247fd1331b.zip
ARM: dts: imx6qdl-sabresd: Provide phy-reset-gpios
GPIO1_25 is used to reset the ethernet phy. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 64e454bcc4a3..2035d6698ec5 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -108,6 +108,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_1>;
phy-mode = "rgmii";
+ phy-reset-gpios = <&gpio1 25 0>;
status = "okay";
};
@@ -172,6 +173,7 @@
MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x80000000
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
+ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x80000000
>;
};
};