diff options
author | Tony Wu <tung7970@gmail.com> | 2013-06-20 14:32:30 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2013-06-21 18:07:03 +0200 |
commit | dfb033f09e2a98a89b7a09f7e913f0b791dd01e1 (patch) | |
tree | fff879c9372e00c36d5e911eb1da63196e66ae80 /arch | |
parent | MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlers (diff) | |
download | linux-dfb033f09e2a98a89b7a09f7e913f0b791dd01e1.tar.xz linux-dfb033f09e2a98a89b7a09f7e913f0b791dd01e1.zip |
MIPS: microMIPS: Fix POOL16C minor opcode enum
As pointed out by Maciej, POOL16C minor opcodes were mostly shifted
by one bit. Correct those opcodes, and also add jraddiusp to the enum.
Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: david.daney@cavium.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index 0f4aec2ad1e6..e5a676e3d3c0 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h @@ -409,10 +409,11 @@ enum mm_32f_73_minor_op { enum mm_16c_minor_op { mm_lwm16_op = 0x04, mm_swm16_op = 0x05, - mm_jr16_op = 0x18, - mm_jrc_op = 0x1a, - mm_jalr16_op = 0x1c, - mm_jalrs16_op = 0x1e, + mm_jr16_op = 0x0c, + mm_jrc_op = 0x0d, + mm_jalr16_op = 0x0e, + mm_jalrs16_op = 0x0f, + mm_jraddiusp_op = 0x18, }; /* |