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| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2020-05-19 07:49:18 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2020-05-26 14:22:22 +0200 |
| commit | 0c8c2c9c201b44eed6c10d7c5c8d25fe5aab87ce (patch) | |
| tree | cfa1fa9c1219accae7c38d4fd0efeef4ca99f7a1 /arch | |
| parent | powerpc/8xx: Remove now unused TLB miss functions (diff) | |
| download | linux-0c8c2c9c201b44eed6c10d7c5c8d25fe5aab87ce.tar.xz linux-0c8c2c9c201b44eed6c10d7c5c8d25fe5aab87ce.zip | |
powerpc/8xx: Move DTLB perf handling closer.
Now that space have been freed next to the DTLB miss handler,
it's associated DTLB perf handling can be brought back in
the same place.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/97f48cc1a2ea6b895bfac0752cbe59deaf2eecda.1589866984.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/powerpc/kernel/head_8xx.S | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index fb5d17187772..9f3f7f3d03a7 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -344,6 +344,17 @@ DataStoreTLBMiss: rfi patch_site 0b, patch__dtlbmiss_exit_1 +#ifdef CONFIG_PERF_EVENTS + patch_site 0f, patch__dtlbmiss_perf +0: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) + addi r10, r10, 1 + stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) + mfspr r10, SPRN_DAR + mtspr SPRN_DAR, r11 /* Tag DAR */ + mfspr r11, SPRN_M_TW + rfi +#endif + /* This is an instruction TLB error on the MPC8xx. This could be due * to many reasons, such as executing guarded memory or illegal instruction * addresses. There is nothing to do but handle a big time error fault. @@ -390,18 +401,6 @@ DARFixed:/* Return from dcbx instruction bug workaround */ /* 0x300 is DataAccess exception, needed by bad_page_fault() */ EXC_XFER_LITE(0x300, handle_page_fault) -/* Called from DataStoreTLBMiss when perf TLB misses events are activated */ -#ifdef CONFIG_PERF_EVENTS - patch_site 0f, patch__dtlbmiss_perf -0: lwz r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) - addi r10, r10, 1 - stw r10, (dtlb_miss_counter - PAGE_OFFSET)@l(0) - mfspr r10, SPRN_DAR - mtspr SPRN_DAR, r11 /* Tag DAR */ - mfspr r11, SPRN_M_TW - rfi -#endif - stack_overflow: vmap_stack_overflow_exception |