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author | Huang Shijie <b32955@freescale.com> | 2013-05-17 05:17:33 +0200 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2013-08-30 22:34:47 +0200 |
commit | d1048aaf6d8b467d226c8d8901017ca48f4e48e9 (patch) | |
tree | 65ed378c84d7063d426f56fcc1529ccee61fa98a /block | |
parent | mtd: parse out the ECC info for the full-id nand chips (diff) | |
download | linux-d1048aaf6d8b467d226c8d8901017ca48f4e48e9.tar.xz linux-d1048aaf6d8b467d226c8d8901017ca48f4e48e9.zip |
mtd: add the ecc info for some full-id nand chips
Add the ecc info for TC58NVG2S0F, TC58NVG3S0F, TC58NVG5D2 and TC58NVG6D2.
From these chips' datasheets, we know that:
The TC58NVG2S0F and TC58NVG3S0F require 4bit ECC for per 512byte.
The TC58NVG5D2 and TC58NVG6D2 require 40bits ECC for per 1024byte.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'block')
0 files changed, 0 insertions, 0 deletions