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authorTakeshi Kihara <takeshi.kihara.df@renesas.com>2018-12-01 08:02:20 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-01-21 13:24:52 +0100
commit7219a4b645208734d45b1d30a4c35b6f09a0e9e6 (patch)
tree8c0bb2052768e02091e6890787e36edbe6ae2aeb /certs/Kconfig
parentpinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 (diff)
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pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of Aug 24, 2018, the MOD_SEL0 bit2 is set when RX2_{A,B}, TX2_{A,B} and SCK2_A pin functions are selected. Fixes: 6d4036a1e3b3ac0f ("pinctrl: sh-pfc: Initial R8A77990 PFC support") Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
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