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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2018-11-16 21:42:34 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2018-11-29 01:49:03 +0100 |
| commit | 523b8b31d3e1292b69f233e1a1814151878d6ac8 (patch) | |
| tree | 0eb5b752f7353fc4687e7ed7ebfd7006959b7019 /certs | |
| parent | ARM: dts: meson: consistently disable pin bias (diff) | |
| download | linux-523b8b31d3e1292b69f233e1a1814151878d6ac8.tar.xz linux-523b8b31d3e1292b69f233e1a1814151878d6ac8.zip | |
ARM: dts: meson: add the TIMER B/C/D interrupts
The timer on Meson6/Meson8/Meson8b SoCs has four internal timer events.
For each of these a separate interrupt exists.
Pass these interrupts to allow using the timers other than TIMER A.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'certs')
0 files changed, 0 insertions, 0 deletions