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authorStefan Kristiansson <stefan.kristiansson@saunalahti.fi>2014-05-26 22:31:42 +0200
committerJason Cooper <jason@lakedaemon.net>2014-07-01 14:15:06 +0200
commit4db8e6d20ccb158de2e06d30a1a421f4d053e429 (patch)
treec80aec29132c68f24c4d0292b5b2627f692f0f6a /crypto/aes_generic.c
parentirqchip: spear_shirq: Simplify register access code (diff)
downloadlinux-4db8e6d20ccb158de2e06d30a1a421f4d053e429.tar.xz
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irqchip: or1k-pic: Migrate from arch/openrisc/
In addition to consolidating the or1k-pic with other interrupt controllers, this makes OpenRISC less tied to its on-cpu interrupt controller. All or1k-pic specific parts are moved out of irq.c and into drivers/irqchip/irq-or1k-pic.c In that transition, the functionality have been divided into three chip variants. One that handles level triggered interrupts, one that handles edge triggered interrupts and one that handles the interrupt controller that is present in the or1200 OpenRISC cpu implementation. Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Link: https://lkml.kernel.org/r/1401136302-27654-1-git-send-email-stefan.kristiansson@saunalahti.fi Acked-by: Jonas Bonn <jonas@southpole.se> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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