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authorRadim Krčmář <rkrcmar@redhat.com>2016-08-08 20:16:23 +0200
committerPaolo Bonzini <pbonzini@redhat.com>2016-08-18 12:19:08 +0200
commitdccbfcf52cebb8963246eba5b177b77f26b34da0 (patch)
tree6b1f29cc3abda66cde275bd0296f119ef849ea59 /crypto/ecc.h
parentKVM: nVMX: fix msr bitmaps to prevent L2 from accessing L0 x2APIC (diff)
downloadlinux-dccbfcf52cebb8963246eba5b177b77f26b34da0.tar.xz
linux-dccbfcf52cebb8963246eba5b177b77f26b34da0.zip
KVM: nVMX: postpone VMCS changes on MSR_IA32_APICBASE write
If vmcs12 does not intercept APIC_BASE writes, then KVM will handle the write with vmcs02 as the current VMCS. This will incorrectly apply modifications intended for vmcs01 to vmcs02 and L2 can use it to gain access to L0's x2APIC registers by disabling virtualized x2APIC while using msr bitmap that assumes enabled. Postpone execution of vmx_set_virtual_x2apic_mode until vmcs01 is the current VMCS. An alternative solution would temporarily make vmcs01 the current VMCS, but it requires more care. Fixes: 8d14695f9542 ("x86, apicv: add virtual x2apic support") Reported-by: Jim Mattson <jmattson@google.com> Reviewed-by: Wanpeng Li <wanpeng.li@hotmail.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>
Diffstat (limited to 'crypto/ecc.h')
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