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authorGeert Uytterhoeven <geert+renesas@glider.be>2019-08-28 13:36:12 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2019-10-01 10:29:40 +0200
commit44b5100f7b744b2cd2a29f8766eea5dbf741e0e5 (patch)
treebd5d071f6e8939909dbee5da6af8e99c0b6af9c3 /crypto/ecdh_helper.c
parentdt-bindings: clk: Add r8a774b1 CPG Core Clock Definitions (diff)
downloadlinux-44b5100f7b744b2cd2a29f8766eea5dbf741e0e5.tar.xz
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soc: renesas: rcar-sysc: Prepare for fixing power request conflicts
Recent R-Car Gen3 SoCs added an External Request Mask Register to the System Controller (SYSC). This register allows to mask external power requests for CPU or 3DG domains, to prevent conflicts between powering off CPU cores or the 3D Graphics Engine, and changing the state of another power domain through SYSC, which could lead to CPG state machine lock-ups. Add support for making use of this register. Take into account that the register is optional, and that its location and contents are SoC-specific. Note that the issue fixed by this cannot happen in the upstream kernel, as upstream has no support for graphics acceleration yet. SoCs lacking the External Request Mask Register may need a different mitigation in the future. Inspired by a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Link: https://lore.kernel.org/r/20190828113618.6672-2-geert+renesas@glider.be
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