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authorRobert Jarzmik <robert.jarzmik@free.fr>2015-02-14 22:41:56 +0100
committerRobert Jarzmik <robert.jarzmik@free.fr>2015-02-23 22:40:48 +0100
commitd6cf30ca716b347587b35923eda400ad2d9e8832 (patch)
tree43d64b951a4054ee20029072266d3df0e88bb8a5 /crypto/memneq.c
parentARM: pxa: Fix typo in zeus.c (diff)
downloadlinux-d6cf30ca716b347587b35923eda400ad2d9e8832.tar.xz
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ARM: pxa: fix pxa interrupts handling in DT
The commit "ARM: pxa: arbitrarily set first interrupt number" changed the first pxa interrupt to 16. As a consequence, device-tree builds got broken, because : - pxa_mask_irq() and pxa_unmask_irq() are using IRQ_BIT() - IRQ_BIT(x) calculates the interrupts as : x - PXA_IRQ(0) Before the commit, the first interrupt shift, PXA_IRQ(0) was 0, therefore IRQ_BIT(x) was x. After the change, it is necessary that the same shift of 16 is applied between the virtual interrupt number and the hardware irq number. This situation comes from the common irq_chip shared between legacy platform builds and device-tree builds. Fix the broken interrupts in DT case by adding this shift in the DT case too. As a consequence of the IRQ_BIT() is removed alltogether from interrupts handling, even in the platform data types of platforms : - a legacy irq domain is used - the irq_chip handles hardware interrupts - the virtual to hardware interrupt conversion is fully handled by irq domain mechanics Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Diffstat (limited to 'crypto/memneq.c')
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