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author | Tom Lendacky <thomas.lendacky@amd.com> | 2014-07-10 17:58:35 +0200 |
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committer | Herbert Xu <herbert@gondor.apana.org.au> | 2014-07-23 15:28:38 +0200 |
commit | 126ae9adc1ec8d9006542f1a5e474b0183845e21 (patch) | |
tree | f3ee814b261aa440feae1b5785f797aaa16cced7 /crypto/testmgr.h | |
parent | crypto: drbg - drbg_exit() can be static (diff) | |
download | linux-126ae9adc1ec8d9006542f1a5e474b0183845e21.tar.xz linux-126ae9adc1ec8d9006542f1a5e474b0183845e21.zip |
crypto: ccp - Base AXI DMA cache settings on device tree
The default cache operations for ARM64 were changed during 3.15.
To use coherent operations a "dma-coherent" device tree property
is required. If that property is not present in the device tree
node then the non-coherent operations are assigned for the device.
Add support to the ccp driver to assign the AXI DMA cache settings
based on whether the "dma-coherent" property is present in the device
node. If present, use settings that work with the caches. If not
present, use settings that do not look at the caches.
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'crypto/testmgr.h')
0 files changed, 0 insertions, 0 deletions