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authorSerge Semin <Sergey.Semin@baikalelectronics.ru>2022-09-09 21:36:20 +0200
committerDamien Le Moal <damien.lemoal@opensource.wdc.com>2022-09-16 18:40:31 +0200
commit9628711aa649e0134f567505290537460326ddc1 (patch)
treea6a4b1ccb5175833485688d7252fa2ee602fd93d /drivers/ata/Kconfig
parentata: ahci-dwc: Add platform-specific quirks support (diff)
downloadlinux-9628711aa649e0134f567505290537460326ddc1.tar.xz
linux-9628711aa649e0134f567505290537460326ddc1.zip
ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface support
It's almost fully compatible DWC AHCI SATA IP-core derivative except the reference clocks source, which need to be very carefully selected. In particular the DWC AHCI SATA PHY can be clocked either from the pads ref_pad_clk_{m,p} or from the internal wires ref_alt_clk_{m,n}. In the later case the clock signal is generated from the Baikal-T1 CCU SATA PLL. The clocks source is selected by means of the ref_use_pad wire connected to the CCU SATA reference clock CSR. In normal situation it would be much more handy to use the internal reference clock source, but alas we haven't managed to make the AHCI controller working well with it so far. So it's preferable to have the controller clocked from the external clock generator and fallback to the internal clock source only as a last resort. Other than that the controller is full compatible with the DWC AHCI SATA IP-core. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Damien Le Moal <damien.lemoal@opensource.wdc.com>
Diffstat (limited to 'drivers/ata/Kconfig')
-rw-r--r--drivers/ata/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 12dd147e434e..1a8a1bbc8a0e 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -179,6 +179,7 @@ config AHCI_DM816
config AHCI_DWC
tristate "Synopsys DWC AHCI SATA support"
select SATA_HOST
+ select MFD_SYSCON if (MIPS_BAIKAL_T1 || COMPILE_TEST)
help
This option enables support for the Synopsys DWC AHCI SATA
controller implementation.