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authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2011-11-27 12:30:29 +0100
committerNicolas Ferre <nicolas.ferre@atmel.com>2012-02-13 18:31:37 +0100
commit88dcde98ad113411f45ea7e8261839f7a1ba3c33 (patch)
treea30da405718ed314da4281261a9861e5b167774f /drivers/ata/pata_at91.c
parentARM: at91: add accessor to manage SMC (diff)
downloadlinux-88dcde98ad113411f45ea7e8261839f7a1ba3c33.tar.xz
linux-88dcde98ad113411f45ea7e8261839f7a1ba3c33.zip
pata/at91: use newly introduced SMC accessors
pata_at91 driver is broken since faee0cc: "make smc register base soc independent" Fix it with newly introduced SMC accessors. The overall action of removal of at91_sys_read/write will allow to use the pata_at91 on a single zImage kernel. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: linux-ide@vger.kernel.org
Diffstat (limited to 'drivers/ata/pata_at91.c')
-rw-r--r--drivers/ata/pata_at91.c48
1 files changed, 21 insertions, 27 deletions
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index a7d91a72ee35..53d3770a0b1b 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -207,11 +207,11 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
{
int ret = 0;
int use_iordy;
+ struct sam9_smc_config smc;
unsigned int t6z; /* data tristate time in ns */
unsigned int cycle; /* SMC Cycle width in MCK ticks */
unsigned int setup; /* SMC Setup width in MCK ticks */
unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */
- unsigned int cs_setup = 0;/* CS4 or CS5 setup width in MCK ticks */
unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/
unsigned int tdf_cycles; /* SMC TDF MCK ticks */
unsigned long mck_hz; /* MCK frequency in Hz */
@@ -244,26 +244,20 @@ static void set_smc_timing(struct device *dev, struct ata_device *adev,
}
dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
- info->mode |= AT91_SMC_TDF_(tdf_cycles);
-
- /* write SMC Setup Register */
- at91_sys_write(AT91_SMC_SETUP(info->cs),
- AT91_SMC_NWESETUP_(setup) |
- AT91_SMC_NRDSETUP_(setup) |
- AT91_SMC_NCS_WRSETUP_(cs_setup) |
- AT91_SMC_NCS_RDSETUP_(cs_setup));
- /* write SMC Pulse Register */
- at91_sys_write(AT91_SMC_PULSE(info->cs),
- AT91_SMC_NWEPULSE_(pulse) |
- AT91_SMC_NRDPULSE_(pulse) |
- AT91_SMC_NCS_WRPULSE_(cs_pulse) |
- AT91_SMC_NCS_RDPULSE_(cs_pulse));
- /* write SMC Cycle Register */
- at91_sys_write(AT91_SMC_CYCLE(info->cs),
- AT91_SMC_NWECYCLE_(cycle) |
- AT91_SMC_NRDCYCLE_(cycle));
- /* write SMC Mode Register*/
- at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
+
+ /* SMC Setup Register */
+ smc.nwe_setup = smc.nrd_setup = setup;
+ smc.ncs_write_setup = smc.ncs_read_setup = 0;
+ /* SMC Pulse Register */
+ smc.nwe_pulse = smc.nrd_pulse = pulse;
+ smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
+ /* SMC Cycle Register */
+ smc.write_cycle = smc.read_cycle = cycle;
+ /* SMC Mode Register*/
+ smc.tdf_cycles = tdf_cycles;
+ smc.mode = info->mode;
+
+ sam9_smc_configure(0, info->cs, &smc);
}
static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
@@ -288,20 +282,20 @@ static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
struct at91_ide_info *info = dev->link->ap->host->private_data;
unsigned int consumed;
unsigned long flags;
- unsigned int mode;
+ struct sam9_smc_config smc;
local_irq_save(flags);
- mode = at91_sys_read(AT91_SMC_MODE(info->cs));
+ sam9_smc_read_mode(0, info->cs, &smc);
/* set 16bit mode before writing data */
- at91_sys_write(AT91_SMC_MODE(info->cs),
- (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16);
+ smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
+ sam9_smc_write_mode(0, info->cs, &smc);
consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
/* restore 8bit mode after data is written */
- at91_sys_write(AT91_SMC_MODE(info->cs),
- (mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8);
+ smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
+ sam9_smc_write_mode(0, info->cs, &smc);
local_irq_restore(flags);
return consumed;