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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2016-04-26 11:03:05 +0200
committerTejun Heo <tj@kernel.org>2016-05-10 18:29:18 +0200
commit4ea8c205e5fd1f7cac8f634347f842e12d8af9b4 (patch)
tree93afa90a90d3bf8189a465032240297e8a9530cb /drivers/ata/sata_dwc_460ex.c
parentata: sata_dwc_460ex: set dma_boundary to 0x1fff (diff)
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ata: sata_dwc_460ex: burst size must be in items not bytes
The burst size as defined by DMAengine API is in items of address width. Derive burst size from AHB_DMA_BRST_DFLT (64 bytes) by dividing it to DMA_SLAVE_BUSWIDTH_4_BYTES (4 bytes) that gives us 16 items. Tested-by: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Tejun Heo <tj@kernel.org>
Diffstat (limited to 'drivers/ata/sata_dwc_460ex.c')
-rw-r--r--drivers/ata/sata_dwc_460ex.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ata/sata_dwc_460ex.c b/drivers/ata/sata_dwc_460ex.c
index aee887350fa3..4cac27de5163 100644
--- a/drivers/ata/sata_dwc_460ex.c
+++ b/drivers/ata/sata_dwc_460ex.c
@@ -65,7 +65,7 @@
#define NO_IRQ 0
#endif
-#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
+#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length */
enum {
SATA_DWC_MAX_PORTS = 1,
@@ -318,8 +318,8 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd
}
sconf.direction = qc->dma_dir;
- sconf.src_maxburst = AHB_DMA_BRST_DFLT;
- sconf.dst_maxburst = AHB_DMA_BRST_DFLT;
+ sconf.src_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
+ sconf.dst_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
sconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
sconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;