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authorJeff Garzik <jeff@garzik.org>2007-02-25 10:19:45 +0100
committerJeff Garzik <jeff@garzik.org>2007-02-26 11:42:39 +0100
commitfb621e2fde735abab854586d52c96c5624bcb5b8 (patch)
tree327cd1775d5d8903908c840f61ca433b63132ab4 /drivers/ata/sata_mv.c
parent[libata] sata_mv: don't touch reserved bits in EDMA config register (diff)
downloadlinux-fb621e2fde735abab854586d52c96c5624bcb5b8.tar.xz
linux-fb621e2fde735abab854586d52c96c5624bcb5b8.zip
[libata] sata_mv: Fix 50xx irq mask
IRQ mask bits assumed a 60xx or newer generation chip, which is very wrong for the 50xx series. Luckily both generations shared the per-port interrupt mask bits, leaving only the "misc chip features" bits to be completely mismatched. Fix 50xx by ensuring we only program bits that exist. Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/ata/sata_mv.c')
-rw-r--r--drivers/ata/sata_mv.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index cc59aca12d42..144b2274706c 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -137,14 +137,19 @@ enum {
PCI_ERR = (1 << 18),
TRAN_LO_DONE = (1 << 19), /* 6xxx: IRQ coalescing */
TRAN_HI_DONE = (1 << 20), /* 6xxx: IRQ coalescing */
+ PORTS_0_3_COAL_DONE = (1 << 8),
+ PORTS_4_7_COAL_DONE = (1 << 17),
PORTS_0_7_COAL_DONE = (1 << 21), /* 6xxx: IRQ coalescing */
GPIO_INT = (1 << 22),
SELF_INT = (1 << 23),
TWSI_INT = (1 << 24),
HC_MAIN_RSVD = (0x7f << 25), /* bits 31-25 */
+ HC_MAIN_RSVD_5 = (0x1fff << 19), /* bits 31-19 */
HC_MAIN_MASKED_IRQS = (TRAN_LO_DONE | TRAN_HI_DONE |
PORTS_0_7_COAL_DONE | GPIO_INT | TWSI_INT |
HC_MAIN_RSVD),
+ HC_MAIN_MASKED_IRQS_5 = (PORTS_0_3_COAL_DONE | PORTS_4_7_COAL_DONE |
+ HC_MAIN_RSVD_5),
/* SATAHC registers */
HC_CFG_OFS = 0,
@@ -2244,7 +2249,11 @@ static int mv_init_host(struct pci_dev *pdev, struct ata_probe_ent *probe_ent,
/* and unmask interrupt generation for host regs */
writelfl(PCI_UNMASK_ALL_IRQS, mmio + PCI_IRQ_MASK_OFS);
- writelfl(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS);
+
+ if (IS_50XX(hpriv))
+ writelfl(~HC_MAIN_MASKED_IRQS_5, mmio + HC_MAIN_IRQ_MASK_OFS);
+ else
+ writelfl(~HC_MAIN_MASKED_IRQS, mmio + HC_MAIN_IRQ_MASK_OFS);
VPRINTK("HC MAIN IRQ cause/mask=0x%08x/0x%08x "
"PCI int cause/mask=0x%08x/0x%08x\n",