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authorBas Nieuwenhuizen <bas@basnieuwenhuizen.nl>2021-05-04 11:43:34 +0200
committerAlex Deucher <alexander.deucher@amd.com>2021-05-06 05:09:54 +0200
commit234055fd9728e6726787bc63b24b6450034876cf (patch)
tree30f60424d15596fc380f0730a421d34c494dce72 /drivers/auxdisplay
parentdrm/amdgpu: Init GFX10_ADDR_CONFIG for VCN v3 in DPG mode. (diff)
downloadlinux-234055fd9728e6726787bc63b24b6450034876cf.tar.xz
linux-234055fd9728e6726787bc63b24b6450034876cf.zip
drm/amdgpu: Use device specific BO size & stride check.
The builtin size check isn't really the right thing for AMD modifiers due to a couple of reasons: 1) In the format structs we don't do set any of the tilesize / blocks etc. to avoid having format arrays per modifier/GPU 2) The pitch on the main plane is pixel_pitch * bytes_per_pixel even for tiled ... 3) The pitch for the DCC planes is really the pixel pitch of the main surface that would be covered by it ... Note that we only handle GFX9+ case but we do this after converting the implicit modifier to an explicit modifier, so on GFX9+ all framebuffers should be checked here. There is a TODO about DCC alignment, but it isn't worse than before and I'd need to dig a bunch into the specifics. Getting this out in a reasonable timeframe to make sure it gets the appropriate testing seemed more important. Finally as I've found that debugging addfb2 failures is a pita I was generous adding explicit error messages to every failure case. Fixes: f258907fdd83 ("drm/amdgpu: Verify bo size can fit framebuffer size on init.") Tested-by: Simon Ser <contact@emersion.fr> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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