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authorLaxman Dewangan <ldewangan@nvidia.com>2012-02-17 14:27:26 +0100
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-02-17 18:19:00 +0100
commitdf00c79f78d8b0ad788daf689ea461ace9d0811f (patch)
tree75ddc463dc7392797bc3d19dad2c010f3497d498 /drivers/base
parentregmap: add regmap_bulk_write() for register write (diff)
downloadlinux-df00c79f78d8b0ad788daf689ea461ace9d0811f.tar.xz
linux-df00c79f78d8b0ad788daf689ea461ace9d0811f.zip
regmap: Bypassing cache when initializing cache
During regcache_init, if client has not passed the default data of cached register then it is directly read from the hw to initialize cache. This hw register read happens before cache ops are initialized and hence avoiding register read to check for the data available on cache or not by enabling flag of cache_bypass. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'drivers/base')
-rw-r--r--drivers/base/regmap/regcache.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index 1ead66186b7c..4b903a8e92a2 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -35,12 +35,17 @@ static int regcache_hw_init(struct regmap *map)
return -EINVAL;
if (!map->reg_defaults_raw) {
+ u32 cache_bypass = map->cache_bypass;
dev_warn(map->dev, "No cache defaults, reading back from HW\n");
+
+ /* Bypass the cache access till data read from HW*/
+ map->cache_bypass = 1;
tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
if (!tmp_buf)
return -EINVAL;
ret = regmap_bulk_read(map, 0, tmp_buf,
map->num_reg_defaults_raw);
+ map->cache_bypass = cache_bypass;
if (ret < 0) {
kfree(tmp_buf);
return ret;