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authorRafał Miłecki <zajec5@gmail.com>2011-07-17 01:06:05 +0200
committerJohn W. Linville <linville@tuxdriver.com>2011-07-19 23:03:11 +0200
commit6f53912fc317ab130bd910c5c30420a21ea38115 (patch)
tree780ce23098e2cc10eb43eede985f1f64ae6bcda7 /drivers/bcma
parentbcma: allow setting FAST clockmode for a core (diff)
downloadlinux-6f53912fc317ab130bd910c5c30420a21ea38115.tar.xz
linux-6f53912fc317ab130bd910c5c30420a21ea38115.zip
bcma: allow enabling PLL
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/bcma')
-rw-r--r--drivers/bcma/core.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/drivers/bcma/core.c b/drivers/bcma/core.c
index 0686b1b5f27a..2d8506dbca76 100644
--- a/drivers/bcma/core.c
+++ b/drivers/bcma/core.c
@@ -81,3 +81,28 @@ void bcma_core_set_clockmode(struct bcma_device *core,
}
}
EXPORT_SYMBOL_GPL(bcma_core_set_clockmode);
+
+void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status, bool on)
+{
+ u16 i;
+
+ WARN_ON(req & ~BCMA_CLKCTLST_EXTRESREQ);
+ WARN_ON(status & ~BCMA_CLKCTLST_EXTRESST);
+
+ if (on) {
+ bcma_set32(core, BCMA_CLKCTLST, req);
+ for (i = 0; i < 10000; i++) {
+ if ((bcma_read32(core, BCMA_CLKCTLST) & status) ==
+ status) {
+ i = 0;
+ break;
+ }
+ udelay(10);
+ }
+ if (i)
+ pr_err("PLL enable timeout\n");
+ } else {
+ pr_warn("Disabling PLL not supported yet!\n");
+ }
+}
+EXPORT_SYMBOL_GPL(bcma_core_pll_ctl);