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authorFlorian Fainelli <f.fainelli@gmail.com>2022-01-07 19:46:11 +0100
committerMiquel Raynal <miquel.raynal@bootlin.com>2022-01-23 16:37:18 +0100
commit02d1d0e4dfc3fdc5aa05b78e7def00dc1e62257e (patch)
treea99b36648a6b17dc8c9cd9e7f111496bff58b420 /drivers/bcma
parentmtd: rawnand: brcmnand: Allow working without interrupts (diff)
downloadlinux-02d1d0e4dfc3fdc5aa05b78e7def00dc1e62257e.tar.xz
linux-02d1d0e4dfc3fdc5aa05b78e7def00dc1e62257e.zip
mtd: rawnand: brcmnand: Add platform data structure for BCMA
Update the BCMA's chipcommon nand flash driver to detect which chip-select is used and pass that information via platform data to the brcmnand driver. Make sure that the brcmnand platform data structure is always at the beginning of the platform data of the "nflash" device created by BCMA to allow brcmnand to safely de-reference it. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220107184614.2670254-7-f.fainelli@gmail.com
Diffstat (limited to 'drivers/bcma')
-rw-r--r--drivers/bcma/driver_chipcommon_nflash.c20
1 files changed, 19 insertions, 1 deletions
diff --git a/drivers/bcma/driver_chipcommon_nflash.c b/drivers/bcma/driver_chipcommon_nflash.c
index d4f699aef8c4..a1a814750b4a 100644
--- a/drivers/bcma/driver_chipcommon_nflash.c
+++ b/drivers/bcma/driver_chipcommon_nflash.c
@@ -7,18 +7,28 @@
#include "bcma_private.h"
+#include <linux/bitops.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/brcmnand.h>
#include <linux/bcma/bcma.h>
+/* Alternate NAND controller driver name in order to allow both bcm47xxnflash
+ * and bcma_brcmnand to be built into the same kernel image.
+ */
+static const char *bcma_nflash_alt_name = "bcma_brcmnand";
+
struct platform_device bcma_nflash_dev = {
.name = "bcma_nflash",
.num_resources = 0,
};
+static const char *probes[] = { "bcm47xxpart", NULL };
+
/* Initialize NAND flash access */
int bcma_nflash_init(struct bcma_drv_cc *cc)
{
struct bcma_bus *bus = cc->core->bus;
+ u32 reg;
if (bus->chipinfo.id != BCMA_CHIP_ID_BCM4706 &&
cc->core->id.rev != 38) {
@@ -33,8 +43,16 @@ int bcma_nflash_init(struct bcma_drv_cc *cc)
cc->nflash.present = true;
if (cc->core->id.rev == 38 &&
- (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT))
+ (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)) {
cc->nflash.boot = true;
+ /* Determine the chip select that is being used */
+ reg = bcma_cc_read32(cc, BCMA_CC_NAND_CS_NAND_SELECT) & 0xff;
+ cc->nflash.brcmnand_info.chip_select = ffs(reg) - 1;
+ cc->nflash.brcmnand_info.part_probe_types = probes;
+ cc->nflash.brcmnand_info.ecc_stepsize = 512;
+ cc->nflash.brcmnand_info.ecc_strength = 1;
+ bcma_nflash_dev.name = bcma_nflash_alt_name;
+ }
/* Prepare platform device, but don't register it yet. It's too early,
* malloc (required by device_private_init) is not available yet. */