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authorPhilip J Kelleher <pjk1939@linux.vnet.ibm.com>2013-02-25 19:27:46 +0100
committerJens Axboe <axboe@kernel.dk>2013-03-11 19:53:55 +0100
commitf37912039eb04979f269de0a7dc1a601702df51a (patch)
treea9f52fbc05d2f616256d9ae1e323fb66f80b57aa /drivers/block/rsxx/dma.c
parentLinux 3.9-rc2 (diff)
downloadlinux-f37912039eb04979f269de0a7dc1a601702df51a.tar.xz
linux-f37912039eb04979f269de0a7dc1a601702df51a.zip
block: IBM RamSan 70/80 trivial changes.
This patch includes trivial changes that were recommended by different members of the Linux Community. Changes include: o Removing the redundant wmb(). o Formatting o Various other little things. Signed-off-by: Philip J Kelleher <pjk1939@linux.vnet.ibm.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
Diffstat (limited to 'drivers/block/rsxx/dma.c')
-rw-r--r--drivers/block/rsxx/dma.c12
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/block/rsxx/dma.c b/drivers/block/rsxx/dma.c
index 63176e67662f..7c3a57bed2cd 100644
--- a/drivers/block/rsxx/dma.c
+++ b/drivers/block/rsxx/dma.c
@@ -432,16 +432,6 @@ static void rsxx_issue_dmas(struct work_struct *work)
/* Let HW know we've queued commands. */
if (cmds_pending) {
- /*
- * We must guarantee that the CPU writes to 'ctrl->cmd.buf'
- * (which is in PCI-consistent system-memory) from the loop
- * above make it into the coherency domain before the
- * following PIO "trigger" updating the cmd.idx. A WMB is
- * sufficient. We need not explicitly CPU cache-flush since
- * the memory is a PCI-consistent (ie; coherent) mapping.
- */
- wmb();
-
atomic_add(cmds_pending, &ctrl->stats.hw_q_depth);
mod_timer(&ctrl->activity_timer,
jiffies + DMA_ACTIVITY_TIMEOUT);
@@ -798,8 +788,6 @@ static int rsxx_dma_ctrl_init(struct pci_dev *dev,
iowrite32(ctrl->cmd.idx, ctrl->regmap + HW_CMD_IDX);
iowrite32(ctrl->cmd.idx, ctrl->regmap + SW_CMD_IDX);
- wmb();
-
return 0;
}