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authorGeert Uytterhoeven <geert+renesas@glider.be>2015-02-05 11:11:28 +0100
committerSimon Horman <horms+renesas@verge.net.au>2015-02-23 22:36:18 +0100
commit89d463ea106dba530786a2815fd174f9e6eab71f (patch)
tree502a864f5d8aee105f7201c33e9f9e9da2df0bb6 /drivers/bus/Kconfig
parentdrivers: bus: Add Renesas Bus State Controller (BSC) DT Bindings (diff)
downloadlinux-89d463ea106dba530786a2815fd174f9e6eab71f.tar.xz
linux-89d463ea106dba530786a2815fd174f9e6eab71f.zip
drivers: bus: Add Simple Power-Managed Bus Driver
Add a driver for transparent busses that don't need a real driver, but where the bus controller is part of a PM domain, or under the control of a functional clock. Typically, the bus controller's PM domain and/or clock must be enabled for child devices connected to the bus (either on-SoC or externally) to function. Hence the sole purpose of this driver is to enable its clock and PM domain (if exist(s)), which are specified in the DT and managed from platform and PM domain code, and to probe for child devices. Due to the child-parent relationship with devices connected to the bus, PM domain and clock state transitions are handled in the correct order. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'drivers/bus/Kconfig')
-rw-r--r--drivers/bus/Kconfig13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig
index 626960819e6d..7e9c2674af81 100644
--- a/drivers/bus/Kconfig
+++ b/drivers/bus/Kconfig
@@ -58,6 +58,19 @@ config OMAP_OCP2SCP
OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
OCP2SCP.
+config SIMPLE_PM_BUS
+ bool "Simple Power-Managed Bus Driver"
+ depends on OF && PM
+ depends on ARCH_SHMOBILE || COMPILE_TEST
+ help
+ Driver for transparent busses that don't need a real driver, but
+ where the bus controller is part of a PM domain, or under the control
+ of a functional clock, and thus relies on runtime PM for managing
+ this PM domain and/or clock.
+ An example of such a bus controller is the Renesas Bus State
+ Controller (BSC, sometimes called "LBSC within Bus Bridge", or
+ "External Bus Interface") as found on several Renesas ARM SoCs.
+
config VEXPRESS_CONFIG
bool "Versatile Express configuration bus"
default y if ARCH_VEXPRESS