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| author | Tony Lindgren <tony@atomide.com> | 2019-03-21 19:00:21 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2019-04-03 18:32:34 +0200 |
| commit | a3e92e7b32f2f932239666e826988a13db10e513 (patch) | |
| tree | 16c1cb406162438d8f47e9287e8d696c756de75a /drivers/bus/tegra-aconnect.c | |
| parent | bus: ti-sysc: Enable all clocks directly during init to read revision (diff) | |
| download | linux-a3e92e7b32f2f932239666e826988a13db10e513.tar.xz linux-a3e92e7b32f2f932239666e826988a13db10e513.zip | |
bus: ti-sysc: Allocate mdata as needed and do platform data based init later
The platform data based init functions typically reset the interconnect
target module configure the registers. As we may need the interconnect
target module specific quirks configured based on the revision register,
we want to move the platform data based init to happen later.
Let's allocate mdata as needed so it's available for sysc_legacy_init()
that we call with module clocks enabled from sysc_init_module().
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'drivers/bus/tegra-aconnect.c')
0 files changed, 0 insertions, 0 deletions